MC144112 motorola 1 advance information
cmos the MC144112 contains four independent dacs which are controlled through a common serial data port. when all dacs are utilized, there are 24 bits in the serial data stream. however, if not all dacs are utilized, the bit stream length may be reduced by up to six bits per unused dac. for new designs, the MC144112 is preferred over the mc144110 and mc144111. the newer MC144112 offers a wider operating temperature range, lower operating supply voltage, and lower supply current. ? operating supply voltage range: 2.7 to 5.5 v * ? maximum supply current (per package) e all dac outputs = zero: 1.25 ma @ 2.7 v 2.1 ma @ 4.5 v all dac outputs = full scale: 30 m a @ 5.5 v ? integral nonlinearity: 1 1/4 to 1/4 lsb ? operating temperature range: 40 to 85 c ? direct r2r network outputs ? direct interface to motorola spi serial data port ? digital data output permits cascading block diagram d in clk enb d cq ** clock data 24bit shift register rrrrr 2r 2r 2r 2r 2r 2r v dd 2r load r4 out r2r detail 6 8 1 d out 13 6 6 6 6 6 6 6 6 6 6 6 6 3 5 10 12 r1 out r2 out r3 out r4 out latches inverting buffers r2r ladder networks * this product is being evaluated for operation at supply voltages less than 2.7 v. contact your motorola representative for further information. ** transparent latch this document contains information on a new product. specifications and information herein are subject to change without notice. order this document by MC144112/d
semiconductor technical data ordering information d suffix sog package case 751a MC144112d sog package 14 1 pin assignment 11 12 13 14 8 9 10 5 4 3 2 1 7 6 nc r4 out d out v dd clk nc r3 out r2 out r1 out nc d in v ss enb nc nc = no connection plastic dip availability dependent on market demand. ? motorola, inc. 1998 rev 3 2/98 tn98030200
MC144112 motorola 2 maximum ratings* (voltages referenced to v ss ) parameter symbol value unit dc supply voltage v dd 0.5 to + 5.5 v input voltage, all inputs v in 0.5 to v dd + 0.5 v dc input current, per pin i 10 ma power dissipation (per output) t a = 70 c t a = 85 c p oh 50 20 mw power dissipation (per package) t a = 70 c t a = 85 c p d 150 50 mw storage temperature range t stg 65 to + 150 c * maximum ratings are those values beyond which damage to the device may occur. electrical characteristics (voltages referenced to v ss , v dd = 2.7 to 5.5 v, t a = 40 to 85 c unless otherwise indicated) symbol parameter test conditions v dd min max unit v ih highlevel input voltage (d in , enb , clk) 2.7 4.5 5.5 2.03 3.15 3.85 e e e v v il lowlevel input voltage (d in , enb , clk) 2.7 4.5 5.5 e e e 0.67 1.35 1.65 v i oh highlevel output current (d out ) v out = v dd 0.5 v 2.7 4.5 0.3 1.1 e e ma i ol lowlevel output current (d out ) v out = 0.5 v 2.7 4.5 1.0 1.8 e e ma i ss quiescent supply current (per package) i out = 0 m a, all dac outputs = zero 2.7 4.5 5.5 e e e 1.25 2.10 2.50 ma i out = 0 m a, all dac outputs = full scale 5.5 e 30 m a i in input leakage current (d in , enb , clk) v in = v dd or 0 v 5.5 e 1 m a v nonl integral nonlinearity (rn out) see figure 1 e 1 1/4 1/4 lsb v step differential nonlinearity (rn out) see figure 2 e 3/4 3/4 lsb v offset offset from v ss d in = $00, see figure 1 e 1/4 1 3/4 lsb switching characteristics (v dd = 2.7 to 5.5 v, voltages referenced to v ss , t a = 40 to 85 c, c l = 50 pf, input t r = t f = 20 ns unless otherwise indicated) symbol parameter min max unit t wh positive pulse width, clk (figures 3 and 4) 166 e ns t wl negative pulse width, clk (figures 3 and 4) 166 e ns t su setup time, enb to clk (figures 3 and 4) 135 e ns t su setup time, d in to clk (figures 3 and 4) 55 e ns t h hold time, clk to enb (figures 3 and 4) 135 e ns t h hold time, clk to d in (figures 3 and 4) 55 e ns t r , t f input rise and fall times, clk e 100 m s c in input capacitance e 10 pf f clk serial data clock frequency (refer to t wh and t wl above) (figures 3 and 4) dc 3 mhz this device contains protection circuitry to guard against damage due to high static voltages or electric fields; however, it is ad- vised that precautions be taken to avoid application of voltage higher than maximum rated voltages to this highimpedance circuit. for proper operation it is recommended that v in and v out be constrained to the range v ss (v in or v out ) v dd . unused inputs must always be tied to an appropriate logic voltage level (e.g., either v ss or v dd ).
MC144112 motorola 3 linearity error (integral nonlinearity). a measure of how straight a device's transfer function is, it indicates the worstcase deviation of linearity of the actual transfer function from the best fit straight line. it is normally specified in parts of an lsb. figure 1. d/a transfer function 100 75 50 25 0 0 $00 15 $0f 31 $1f 47 $2f 63 $3f v nonl program step output voltage @ rn out, % (v dd v ss ) v offset actual ideal figure 2. definition of step size variance (differential nonlinearity) v rn out v step digital number v step = 0.75 v dd 64 v dd 64 (for any adjacent pair of digital numbers)
MC144112 motorola 4 figure 3. serial input, positive clock d in d 1 msb d 2 d n c 2 c 1 c n enb clk t su t wh t wl t h t h t su 50% 50% 1 / f clk figure 4. serial input, negative clock d in d 2 d n c 2 c 1 c n enb clk t su t wl t wh t h t h t su d 1 msb 1 / f clk
MC144112 motorola 5 pin descriptions inputs d in data input four 6bit words are entered serially, msb first, into the digital data input, d in . the last 6bit word shifted in determines the output level of pin r1 out. the nexttolast 6bit word affects pin r2 out, etc. enb negative logic enable the enb pin must be low (active) during the serial load. on the lowtohigh transition of enb , data contained in the shift register is loaded into the latch. clk shift register clock data is shifted into the register on the hightolow transi- tion of clk. clk is fed into the dinput of a transparent latch, which is used for inhibiting the clocking of the shift reg- ister when enb is high. the MC144112 usually uses 24 clk cycles. see table 1 for additional information. outputs d out data output the digital data output is primarily used for cascading the dacs and may be fed into d in of the next stage. if not used, the output should be floated. r1 out through r4 out resistor network outputs these are the r2r resistor network outputs. these out- puts may be fed to highimpedance loads. the r value of the resistor network ranges from 7 to 15 k w . if not used, an output should be floated. supply pins v ss negative supply voltage this pin is usually ground. v dd positive supply voltage the voltage applied to this pin determines the analog out- put swing. the dac output voltage range is from approxi- mately v ss to v dd . applications information for those applications where supply current is critical, any unused dac channels should be programmed for fullscale output. the unused outputs are floated (no connects). for example, with a 4.5 v supply, the worst case current when all dacs are programmed for zero output is 2.1 ma. this is 2.1 ma for the package; each dac is drawing 1/4 of this, or 525 m a. if only two channels are needed, minimum supply current is achieved by programming the two unused channels to fullscale output (all ones). in this case, the worst case supply current is approximately two times 525 m a, or 1.05 ma. table 1. number of channels vs clocks required number of channels required minimum number of clock cycles* outputs used 1 6 r1 out 2 12 r1 out, r2 out 3 18 r1 out, r2 out, r3 out 4 24 r1 out, r2 out, r3 out, r4 out * additional clock cycles can be used, with the leading extra bits being don't cares. for example, eight clocks can be used if one channel is needed. the first two bits are don't cares; the last six bits determine the dac output.
MC144112 motorola 6 package dimensions d suffix sog (small outline gullwing) package case 751a03 min min max max millimeters inches dim a b c d f g j k m p r 8.55 3.80 1.35 0.35 0.40 0.19 0.10 0 5.80 0.25 8.75 4.00 1.75 0.49 1.25 0.25 0.25 7 6.20 0.50 0.337 0.150 0.054 0.014 0.016 0.008 0.004 0 0.299 0.010 0.344 0.157 0.068 0.019 0.049 0.009 0.009 7 0.244 0.019 1.27 bsc 0.050 bsc notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. -a- -b- p g c k seating plane d 14 pl m j 7 pl r x 45 1 7 8 14 0.25 (0.010) t b a m s s b 0.25 (0.010) m m f motorola reserves the right to make changes without further notice to any products herein. motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. atypicalo parameters which may be provided in motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. motorola does not convey any license under its patent rights nor the rights of others. motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the motorola product could create a situation where personal injury or death may occur. should buyer purchase or use motorola products for any such unintended or unauthorized application, buyer shall indemnify and hold motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that motorola was negligent regarding the design or manufacture of the part. motorola and are registered trademarks of motorola, inc. motorola, inc. is an equal opportunity/affirmative action employer. mfax is a trademark of motorola, inc. how to reach us: usa / europe / locations not listed : motorola literature distribution; japan : nippon motorola ltd.: spd, strategic planning office, 141, p.o. box 5405, denver, colorado 80217. 13036752140 or 18004412447 4321 nishigot anda, shagawaku, tokyo, japan. 0354878488 mfax ? : rmfax0@email.sps.mot.com touchtone 1 6022446609 asia / pacific : motorola semiconductors h.k. ltd.; 8b tai ping industrial park, motorola fax back system us & canada only 18007741848 51 ting kok road, tai po, n.t., hong kong. 85226629298 http://sps.motorola.com/mfax/ home page : http://motorola.com/sps/ customer focus center: 18005216274 MC144112/d ?
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